Digital Verification Engineer for Mixed Signal IPs

Chipright is looking for ASIC Mixed-Signal Verification Engineer for Verification of pure digital and/or mixed signal design blocks.Responsibilities include:-Take full responsibility for verification of a design, being block or sub-system-Define and implement UVM based test environments-Break-down Requirements and create Verification Specifications and defining test cases-Develop, run and debug test cases-Using real-numbered analog behavioral models in SystemVerilog/Verilog-AMS or electrical behavioral models in Verilog-A-With signal processing using MatlabExperience required:-Several years’ experience from verification using System Verilog and UVM.-Experience in developing verification test plans and directed/randomized test cases-Experience in Mixed Signal Verification